Welcome to the 126th edition of Deep Tech Catalyst, the educational channel from The Scenarionist where science meets venture!
This week, I sat down with Isaac Sigron, Managing Director at Koch Disruptive Technologies. We explored why advanced packaging has become one of the strategic bottlenecks behind AI infrastructure, how the shift from monolithic chips to chiplets changes both technical architecture and venture design, why component companies in AI can still represent very large markets, and how founders should think about pricing, procurement, and team-problem fit when building in complex semiconductor ecosystems.
Key takeaways from the episode:
🧩 Advanced packaging is becoming a core AI infrastructure bottleneck
As transistor scaling becomes harder, the industry can no longer rely on Moore’s Law alone. Advanced packaging is emerging as a way to bring compute, memory, power, and interconnect closer together while addressing yield, bandwidth, and system-level performance constraints.
⚡ The future of compute depends on memory proximity
AI workloads are increasingly limited by the cost of moving data. Bringing memory closer to compute through high-bandwidth memory, chiplets, and eventually 3D stacking can improve bandwidth, reduce power loss, and reshape how performance is designed at the package level.
💼 In AI infrastructure, component plays can become large markets
In AI infrastructure, a single bottleneck can represent a massive opportunity if it sits in the critical path of compute scaling and the team knows how to integrate into the ecosystem.
🤝 Procurement moves slower than technology
Founders introducing new compute architectures often need to frame their business model in terms customers already understand. The best pricing structures are not about extracting more value from the customer, but proving a clear win-win through NRE, per-chip economics, scale, and shared upside.
🎯 Team-problem fit matters as much as product-market fit
In Deep Tech, many teams often attack the same bottleneck at the same time. What separates the most compelling companies is not just the technology, but whether the founding team is uniquely suited to understand the problem, navigate the supply chain, work with customers, and turn technical insight into an investable company.
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BEYOND THE CONVERSATION — STRATEGIC INSIGHTS FROM THE EPISODE
Advanced Packaging Is Reshaping How AI Compute Scales
Understanding advanced packaging requires looking beneath the visible surface of the AI race. Most conversations about AI still revolve around models, applications, and, occasionally, GPUs.
But the ability to scale AI compute depends on a deeper infrastructure foundation: the systems that allow more logic, more memory, more bandwidth, more power, and more connectivity to operate together efficiently.
That is where advanced packaging becomes strategically important.
It is not simply a semiconductor manufacturing detail. It is part of the infrastructure required to make modern AI systems possible.
Around AI compute, the critical questions increasingly involve interconnect, optical connectivity, memory access, networking, advanced packaging, and the physical architecture that determines whether compute can continue scaling.
The challenge is that the old playbook no longer sufficient on its own.
For decades, the semiconductor industry was able to rely on a relatively simple strategic pattern: make transistors smaller, place more of them into roughly the same area, and unlock more capability over time. That pattern shaped how chips were designed, how performance improved, and how the industry thought about progress.
Advanced packaging emerged because that pattern started to run into scaling limits.
From Moore’s Law to Chiplets
A chip, at its most basic level, can be understood as layers of silicon, insulators, and copper arranged to implement logic and memory.
For a long time, progress came from the ability to draw those structures with an ever-narrower pen tip. That was the operational logic behind Moore’s Law in this discussion: increasing transistor density over time.
The industry kept increasing transistor density, and as a result, chips became dramatically more powerful without requiring a comparable increase in physical size.
Compute power, memory capacity, and networking bandwidth all rose by orders of magnitude while the absolute size of the chip did not change significantly.
But as transistors started to get very small, around the sub-10-nanometer range, increasing transistor density became much harder.
As density improvements became harder to sustain at the same pace, one response was to make chips larger. For a while, that helped.
Then yield issues began to appear. As chips became larger, semiconductor defects became more likely because they tend to be proportional to the area of the chip.
At the same time, another pressure was building.
Historically, logic chips and memory chips could remain separate. A logic chip might include some memory internally, but it was primarily built for logic. A memory chip might include some logic, but it was primarily built for memory.
These chips communicated through the motherboard at relatively low interconnect speed. Rising compute requirements changed the intensity of that relationship.
It became increasingly important to bring logic and memory closer together, rather than having them communicate through relatively slow board-level interconnects. The industry needed to move them closer together.
This is the core logic behind advanced packaging.
Instead of building one massive chip, the system can be broken into smaller building blocks, or chiplets. A compute chiplet can be placed close to a few layers of memory, such as high-bandwidth memory.
These components can then be connected through a small interposer, almost like a “very small motherboard”.
The result is a different way to scale.
Advanced packaging helps address the yield problem because smaller chiplets are easier to manufacture than one very large chip. It also helps address the memory problem because compute and memory can be placed much closer together. That proximity increases bandwidth and reduces the power lost in moving data.
The tradeoff is that the structure becomes much more complex and costly. That complexity is precisely why the field is technically and commercially interesting, and why it is becoming an important design space for compute architecture.
The new frontiers of packaging innovation
Across the conversation, several areas emerged as frontiers of advanced packaging innovation:
One is the ability to build larger interposers and larger panels that can host more chiplets. The goal is to create bigger and more powerful compute and memory blocks by allowing more chiplets to sit together inside the package.
Another major frontier is 3D memory stacking. Putting memory next to compute was already a major step. Putting memory on top of compute would be a more radical version of the same principle. The technical logic remains the same: bring memory closer to logic, increase bandwidth, and reduce the inefficiency of data movement.
A third frontier is optical connectivity. The industry is trying to move optics closer and closer to the compute itself. Compute remains electronic, but the need to move data efficiently across systems creates a push to bring optical connectivity inside the package or near it.
The last one points toward modular chiplet architectures. If chiplets can be designed, reused, and amortized across multiple projects, the economics of semiconductor development may begin to change.
Startup Archetypes and Venture Logic in Advanced Packaging
Advanced packaging is an unusual market for startups. On one hand, it is a relatively new field. On the other hand, it is deeply controlled by large incumbents.
Only a small number of companies can execute advanced packaging at scale today, and in some parts of the market there may effectively be only one or two players with true scaled capability.
That creates a difficult but compelling environment for venture-backed companies.
Across the conversation, we explored several potential startup archetypes, each approaching advanced packaging in a different way.
The first archetype is the company that uses advanced packaging innovation to build a product.
In this case, packaging innovation is embedded inside the product strategy rather than sold as a standalone process capability. The packaging innovation matters, but it is tied to a specific product and a specific performance outcome.
The second archetype is the company that develops a piece of the process.
These startups solve problems that must fit into the broader advanced packaging ecosystem. They might work on thermal management, optical waveguides inside the interposer, or more efficient ways to deliver power into the package.
For these companies, the central question is how they fit inside the ecosystem. A component can be technically impressive and still face challenges if it cannot be integrated into the way the industry actually builds systems.
A third potential archetype is more forward-looking.
These are companies that reimagine architecture and business model at the same time. They are not simply improving a process step or building a product on top of an existing model. They are asking whether advanced packaging could make a different semiconductor business model possible. Chiplets are one example of this logic.
In this model, customers may be large semiconductor companies or AI infrastructure players building the larger systems into which those chiplets are integrated.
Pricing, Procurement, and Win-Win B2B Deals
A new compute architecture does not automatically turn into closed deals.
In semiconductor infrastructure, many strong technical ideas encounter the reality of procurement. Customers may be willing to evaluate new technical approaches, but they can be conservative when it comes to unfamiliar commercial structures and business models.
That means founders need to be pragmatic. If a business model is new, it may need to be presented in a form the customer already understands.
For instance, the founder can change the economics. An option could be to offer a discount because the startup plans to amortize the development cost across multiple projects rather than charging one customer for the entire burden.
In exchange, if the customer scales, the startup participates in the upside through per-chip economics.
Still, the objection will come. Customers will worry about margin stacking. They will ask whether the startup is inserting itself into the economics and making the final product more expensive. They will compare the model with alternatives and test whether the new structure actually benefits them.
There is only one real answer. The math has to work.
If the customer would be better off paying a different commercial structure, then that option should be available. If the chiplet-based model is better, the founder must prove it with numbers.
The customer has to see that the proposed structure improves the economics of their project. This is the discipline behind a B2B win-win deal.
A business model built on extracting more value from the customer without improving the customer’s position may look attractive in a pitch, but it is unlikely to work in negotiation. The right model works because both sides benefit.
Team-Problem Fit
The deepest venture lesson from advanced packaging is not only about chips. It is about team-problem fit.
Innovation comes in waves. When a real problem emerges, multiple teams often identify it at roughly the same time.
In a world where technical information moves quickly and industry bottlenecks become visible across ecosystems, it is rare for only one team to see a major opportunity.
In other words, innovations arrive in waves because constraints arrive in waves.
This is especially true in advanced packaging.
When many companies are attacking the same problem, that can be a good sign. It often means the problem is real.
But it also changes the investor’s question. The question is not simply whether the problem exists. The question is which team is best suited to solve it.
That is team-problem fit.
The strongest founders are not necessarily the ones with the most interesting technology in isolation. They are the ones whose experience, insight, relationships, technical fluency, and market understanding match the specific problem they are trying to solve.
This matters because advanced packaging is a field where founders must deeply understand the industry context.
They must understand dependencies. They must understand supply-chain challenges, customer behavior, capital requirements, integration pathways, and the pace at which real adoption can happen.
The challenges often begin when a team develops an impressive solution in a lab or technical environment, and only later starts searching for something to do with it.
The technology may be real. The engineering may be difficult. The invention may be elegant. But that is not the same as a company.
A strong startup needs a problem that matters enough, a customer that understands the pain, a path into the value chain, a business model that works, and a team that can navigate the realities between invention and adoption.
This mistake is not limited to pre-seed companies. It can appear even at later stages. Teams can spend years building excellent technology and still be working hard to find the right use case.
In hardware and semiconductor markets, that is a particularly expensive way to learn.
Success depends on whether the company is positioned around a bottleneck that matters, whether the solution creates economic leverage, whether customers can adopt the model, and whether the founding team has the right fit with the problem.
In conclusion, advanced packaging is a technical field, but not only a technical one. It is a test of venture design, market timing, capital discipline, and commercial vision.
